Power Integrity Solutions for FPGA Systems


Patents

1. Method and System for Measuring the Impedance of the Power Distribution Network in Programmable Logic Device Applications  (US 9,310,432)

2. Embedded Vector Network Analyzer for Measuring the Impedance and S-Parameter Model of the Power Distribution Network in Programmable Logic Device Systems (patent pending)


Publications

1. Technical paper: "Measuring S-parameter Models of Power Delivery Networks in FPGA Systems by Using an Embedded Multi-port Vector Network Analyzer", DesignCon 2018

2. Technical paper: "Experimental Optimization of Decoupling Capacitors in FPGA Designs by On-Die Measurement of Power Distribution Impedance Frequency Profile", DesignCon 2012

3. Technical paper: "Method for Troubleshooting Power Integrity Problems in Programmable Logic Device Electronic Systems by Embedded Measurement of Power Distribution Impedance", DesignCon 2012

4. Workshop slides: "Power Integrity Improvement in FPGA Boards Using Embedded 1-Port Vector Network Analyzer", PCB West, 2017


Book: "Noise Coupling in Integrated Circuits: A Practical Approach to Analysis, Modeling, and Suppression"

Author: Cosmin Iorga

Hardcover: 286 pages
Size: 6 x 9 x 0.8 inches
Publisher: NoiseCoupling.com
Year: 2008
Language: English
ISBN: 978-0615197562
LCCN: 2008941913



Price $78
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or buy this book on Amazon.com

ChipQuakeTM Power Integrity Explorer Simulation Software ​​
Learning Edition v1.1
​​
Price $99



payments process through paypal
credit cards accepted


or buy this software on Amazon.com

download ChipQuakeTM user guide

Bundle Book and Simulation Software:  ​​
Noise Coupling in Integrated Circuits: A Practical Approach to Analysis, Modeling, and Suppression  +  ChipQuakeTM Power Integrity Explorer ​​

Price $159



payments process through paypal
credit cards accepted