Hands-on Workshop on Noise Coupling in Mixed-Signal Integrated Circuits

Instructor: Dr. Cosmin Iorga

Class Description:

This hands-on workshop uses the ChipQuake ™ software simulation tool developed at NoiseCoupling.com.  Attendees are exposed to various design examples focused on estimation of noise coupling in early architectural stages of the design, performing “what if” analysis in choosing the fabrication process and technology options, assigning the power supply pins, designing the power distribution architecture, choosing the number, types, and values of decoupling capacitors, partitioning the chip floorplan, and implementing various types of guard rings.

This one-day technical seminar and hands-on workshop has been developed specifically for analog designers who work on mixed-signal integrated circuits. The morning session is organized as a technical seminar and the afternoon session as a workshop. The technical seminar covers noise coupling mechanisms, measurement, suppression, and simulation. The workshop uses a hands-on approach to walk the attendees through a design case study, focusing on the estimation of noise coupling and the implementation of various suppression techniques. The workshop exercises use the ChipQuake^TM noise coupling software simulation tool developed by NoiseCoupling.com, which is a fast noise coupling simulator for early stages of the design flow.

Course Outline:

Morning Session

1. Overview of noise coupling in integrated circuits
This section discusses general aspects of noise coupling in integrated circuits and potential problems that may occur due to noise coupling.

2. Noise Coupling Mechanisms
This section analyzes the noise generation, propagation, and reception at the physical structure levels of devices, chips, packages, and printed circuit boards. The development of equivalent circuits representing noise coupling mechanisms is presented.

3. Noise Coupling Measurement
This section presents different noise coupling measurement techniques and analyzes their accuracy and applicability. Emphasis is made on the aspects of noise coupling measurement in large and complex VLSI chips.

4. Noise Coupling Suppression
This section presents and analyzes various suppression techniques, emphasizing their advantages and limitations. In addition to conventional techniques, circuit level compensation methods and examples are presented and analyzed.

5. Noise Coupling Simulation
This section discusses the noise modeling and simulation in post-layout, pre-layout, and architectural stages of the design flow, emphasizing the advantages and limitations specific to each of these stages. A practical approach for modeling the noise coupling early in the architectural stages of design is presented.

Afternoon Session

1. Presentation of the ChipQuake^TM noise coupling simulation tool
This section familiarizes the attendees with the features, coverage, and limitations of the ChipQuake^TM simulation software.

2. Workshop Exercises
Each participant receives a copy of ChipQuake^TM on CDROM to use during the workshop and to keep afterwards. The participants need to bring their own laptop computers on which they install the ChipQuake^TM software and run the workshop exercises.